DC01 updates and I2C avr speed overwrite (#4088)
* DC01 updates and I2C avr speed overwrite - General updating of DC01 - Made F_SCL define in AVR I2C driver overwritable from config.h * Update drivers/avr/i2c_master.c
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@ -8,7 +8,9 @@
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#include "i2c_master.h"
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#include "i2c_master.h"
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#include "timer.h"
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#include "timer.h"
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#ifndef F_SCL
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#define F_SCL 400000UL // SCL frequency
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#define F_SCL 400000UL // SCL frequency
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#endif
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#define Prescaler 1
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#define Prescaler 1
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#define TWBR_val ((((F_CPU / F_SCL) / Prescaler) - 16 ) / 2)
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#define TWBR_val ((((F_CPU / F_SCL) / Prescaler) - 16 ) / 2)
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@ -46,6 +46,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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#define MATRIX_COL_PINS { F4, F1, F0, F7, F6, F5 }
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#define MATRIX_COL_PINS { F4, F1, F0, F7, F6, F5 }
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#define UNUSED_PINS
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#define UNUSED_PINS
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#define F_SCL 300000UL
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/* COL2ROW, ROW2COL, or CUSTOM_MATRIX */
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/* COL2ROW, ROW2COL, or CUSTOM_MATRIX */
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#define DIODE_DIRECTION COL2ROW
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#define DIODE_DIRECTION COL2ROW
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@ -43,7 +43,7 @@ static uint8_t error_count_arrow = 0;
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/* Set 0 if debouncing isn't needed */
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/* Set 0 if debouncing isn't needed */
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#ifndef DEBOUNCING_DELAY
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#ifndef DEBOUNCING_DELAY
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# define DEBOUNCING_DELAY 5
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# define DEBOUNCING_DELAY 5
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#endif
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#endif
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#if (DEBOUNCING_DELAY > 0)
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#if (DEBOUNCING_DELAY > 0)
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@ -135,10 +135,7 @@ uint8_t matrix_cols(void) {
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return MATRIX_COLS;
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return MATRIX_COLS;
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}
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}
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i2c_status_t i2c_transaction(uint8_t address, uint32_t mask, uint8_t col_offset);
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i2c_status_t i2c_transaction(uint8_t address, uint32_t mask, uint8_t col_offset);
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//uint8_t i2c_transaction_numpad(void);
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//uint8_t i2c_transaction_arrow(void);
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//this replases tmk code
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//this replases tmk code
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void matrix_setup(void){
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void matrix_setup(void){
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@ -220,7 +217,7 @@ uint8_t matrix_scan(void)
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matrix[i] &= 0x3F; //mask bits to keep
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matrix[i] &= 0x3F; //mask bits to keep
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}
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}
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}
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}
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}else{ //no error
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}else{ //no error
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error_count_right = 0;
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error_count_right = 0;
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}
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}
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@ -440,40 +437,28 @@ static void unselect_cols(void)
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// Complete rows from other modules over i2c
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// Complete rows from other modules over i2c
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i2c_status_t i2c_transaction(uint8_t address, uint32_t mask, uint8_t col_offset) {
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i2c_status_t i2c_transaction(uint8_t address, uint32_t mask, uint8_t col_offset) {
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i2c_status_t err = i2c_start((address << 1) | I2C_WRITE, 10);
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i2c_status_t err = i2c_start((address << 1) | I2C_WRITE, 10);
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if (err) return err;
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i2c_write(0x01, 10); //request data in address 1
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i2c_write(0x01, 10);
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if (err) return err;
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i2c_start((address << 1) | I2C_READ, 10);
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i2c_start((address << 1) | I2C_READ, 5);
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if (err) return err;
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err = i2c_read_ack(10);
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err = i2c_read_ack(10);
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if (err == 0x55) { //synchronization byte
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if (err == 0x55) { //synchronization byte
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for (uint8_t i = 0; i < MATRIX_ROWS-1 ; i++) { //assemble slave matrix in main matrix
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for (uint8_t i = 0; i < MATRIX_ROWS-1 ; i++) { //assemble slave matrix in main matrix
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matrix[i] &= mask; //mask bits to keep
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matrix[i] &= mask; //mask bits to keep
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err = i2c_read_ack(10);
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err = i2c_read_ack(10);
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if (err >= 0) {
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matrix[i] |= ((uint32_t)err << (MATRIX_COLS_SCANNED + col_offset)); //add new bits at the end
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matrix[i] |= ((uint32_t)err << (MATRIX_COLS_SCANNED + col_offset)); //add new bits at the end
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}
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} else {
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//last read request must be followed by a NACK
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return err;
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matrix[MATRIX_ROWS - 1] &= mask; //mask bits to keep
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}
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err = i2c_read_nack(10);
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}
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//last read request must be followed by a NACK
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matrix[MATRIX_ROWS - 1] &= mask; //mask bits to keep
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err = i2c_read_nack(10);
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if (err >= 0) {
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matrix[MATRIX_ROWS - 1] |= ((uint32_t)err << (MATRIX_COLS_SCANNED + col_offset)); //add new bits at the end
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matrix[MATRIX_ROWS - 1] |= ((uint32_t)err << (MATRIX_COLS_SCANNED + col_offset)); //add new bits at the end
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} else {
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return err;
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}
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} else {
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} else {
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i2c_stop(10);
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i2c_stop(10);
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return 1;
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return 1;
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}
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}
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i2c_stop(10);
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i2c_stop(10);
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if (err) return err;
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return 0;
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return 0;
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}
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}
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